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Industry News
Latest from electronics industry
The firmware-hardware handshake in a silicon governance system
Hardware senses condition, firmware executes bounded actions, and governed evidence determines whether action is valid. The post The firmware-hardware handshake in a silicon governance system appeared first on EDN.
The Evolution Of UCIe
How the standard matured from simple connectivity to secure data movement across multiple chiplets and packaging approaches. The post The Evolution Of UCIe appeared first on Semiconductor Engineering.
Chip Industry Technical Paper Roundup: Jun. 2
Fixed HW implementations of neural networks; LLM inference scaling; silent data corruption detection; NAND flash tunneling; HW-SW co-design benchmarks for SoCs; chiplet side-channel attacks; GPU power management. The post Chip Industry Technical Paper Roundup: Jun. 2 appeared first on Semiconductor Engineering.
Research Bits: Jun. 2
Integrated valleytronics device; tabletop 3D EUV for research; humidity-sensitive optical data storage. The post Research Bits: Jun. 2 appeared first on Semiconductor Engineering.
ScioSense Launches UFC23 Ultrasonic Flow Converter for High-Precision, Ultra-Low-Power Smart Metering
The UFC23 ultrasonic flow converter is claimed to allow manufacturers to retain flexibility over system architecture and microcontroller selection. The post ScioSense Launches UFC23 Ultrasonic Flow Converter for High-Precision, Ultra-Low-Power Smart Metering appeared first on EE Times.
TSMC Defends Transistor Scaling Amid Huawei’s ‘Her’s Law’ Proposal
Kevin Zhang said 3D integration is important, but transistor scaling remains the semiconductor industry's primary driver of performance and energy-efficiency gains. The post TSMC Defends Transistor Scaling Amid Huawei’s ‘Her’s Law’ Proposal appeared first on EE Times.
HIL platform automates tests to validate hardware behavior
The new hardware-in-the-loop (HIL) framework enables companies to go from zero testing infrastructure to a fully automated pipeline in days. The post HIL platform automates tests to validate hardware behavior appeared first on EDN.
Early Memory Contention Checks Reduce IC Design Risks
Automated schematic-level contention analysis detects memory bottlenecks early, improving SoC reliability, predictability, and silicon quality. The post Early Memory Contention Checks Reduce IC Design Risks appeared first on EE Times.
High-Voltage GaN Bi-Directional Switches: Strong Performance, Simpler to Use
The demand for more efficient power solutions continues to put pressure on designers to optimize system design without compromising performance. Read how you can simplify high-voltage power conversion and reduce system cost, size and complexity for a range of demanding applications with GaN BDS. High-voltage GaN bi-directional switches enable implementation of single-stage power converters with […] The post High-Voltage GaN Bi-Directional Switches: Strong Performance, Simpler to Use appear
Product Recall Management Guide for Electronics Manufacturing SMBs
This guide explains what product recalls are, what risks they create, and how small and midsize manufacturers can handle them in an organized way. The post Product Recall Management Guide for Electronics Manufacturing SMBs appeared first on EE Times.
AI-Accelerated Software Security Vulnerability Discovery: Is Hardware Next?
AI is revolutionizing software vulnerability discovery. Could hardware security be next? Explore risks, AI threats and chip defense strategies. In depth. The post AI-Accelerated Software Security Vulnerability Discovery: Is Hardware Next? appeared first on EE Times.
TP-Link’s Tapo P105: A Kasa EP10 clone, or evolutionarily derived?
Two devices. Same manufacturer. Similar cosmetics. (Near-)identical dimensions. Different branding. What about the insides? The post TP-Link’s Tapo P105: A Kasa EP10 clone, or evolutionarily derived? appeared first on EDN.
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